The present invention generally relates to a method for forming three-dimensional circuitization in a substrate and circuit formed and more particularly, relates to a method for forming conductive traces in a substrate for providing electrical communication between conductive regions by a molten solder screening technique and circuits formed by the technique.
The circuitization process for electronic substrates usually involves several sequential processing steps. Among these steps are the initial chemical or physical machining of substrate line traces and via holes. Thereafter, the traces and holes are treated with various solutions to produce the metalized finish required to make them electrically conductive. A final step is then required to deposit joining metallurgy, usually of the solder type, to attach the electronic components. After surface grooves or via holes are first formed in the top surface or through a substrate and treated with a wetting material such as a flux, a suitable technique for filling the grooves and holes must be utilized to enable a reliable and low cost process for forming three-dimensional circuitization in the substrate. Suitable techniques that can be used for filling the grooves and holes can be selected from injection molded solder (IMS) technique or a molten solder screening (MSS) technique.
The IMS technique has been developed to replace a solder paste screening technique that is normally used in bumping semiconductor substrates. A major advantage of the IMS technique is that there is little volume change between the molten solder and the resulting solder bump. The IMS technique utilizes a head that fills boro-silicate glass molds that are wide enough to cover most single chip modules. A narrow wiper provided behind the solder slot passes the filled holes once to remove excess solder. The IMS method for solder bonding is then carried out by applying a molten solder to a substrate in a transfer process. When smaller substrates, i.e., chip scale or single chip modules (SCM""s) are encountered, the transfer step is readily accomplished since the solder-filled mold and substrate are relatively small in area and thus can be easily aligned and joined in a number of configurations. For instance, the process of split-optic alignment is frequently used in joining chips to substrates. The same process may also be used to join a chip-scale IMS mold to a substrate (chip) which will be bumped.
A more recently developed method that alleviated the limitations of the solder paste screening technique of significant volume reductions between the initial paste and the final solder volume is the molten solder screening (MSS) method. In the MSS method, pure molten solder is dispensed. When the MSS solder-bumping method is used on large substrates such as 8 inch or 12 inch wafers, surface tension alone is insufficient to maintain intimate contact between a mold and a substrate. In order to facilitate the required abutting contact over large surface areas, a new method and apparatus for maintaining such are necessary.
For instance, in a co-pending application Ser. No. 09/070,121 commonly assigned to the Assignee of the present application which is hereby incorporated by reference in its entirety, a method for forming solder bumps by a MSS technique that does not have the drawbacks or shortcomings of the conventional solder bumping techniques has been proposed. In the method, a flexible die member is used in combination with a pressure means to enable the die member to intimately engage a mold surface and thus filling the mold cavities and forming the solder bumps. The flexible die head also serves the function of a wiper by using a trailing edge for removing excess molten solder from the surface of the mold.
The MSS process can be carried out by first filling a multiplicity of cavities in the surface of a mold with molten solder. This is accomplished by first providing a stream of molten solder and then passing a multiplicity of cavities in the mold surface in contact with the surface of the stream while adjusting a contact force such that the molten solder exerts a pressure against the surface of the mold to fill the cavities with solder and to remove excess solder from the surface of the mold. The stream of molten solder is supplied through a die head constructed of a flexible metal sheet that is capable of flexing at least 0.0015 inches per inch of the die length. The solder has a composition between about 58% tin/42% lead and about 68% tin/32% lead. The multiplicity of cavities each has a depth-to-width aspect ratio of between about 1:1 and about 1:10. The mold body is made of a material that has a coefficient of thermal expansion substantially similar to that of silicon or the final solder receiving material. The contact between the multiplicity of cavities and the surface of the molten solder stream can be adjusted by a pressure means exerted on the flexible die.
The MSS method is therefore a new technique for solder bumping large 8 inch or even 12 inch silicon wafers. As previously described, the technique basically involves filling cavities in wafer-sized mold plates with molten solder, solidifying the solder and then transferring the solder in these cavities to the wafer. The transfer process requires aligning the cavities in a mold plate to the solder receiving pads on a silicon wafer and then heating the assembly to a solder reflow temperature. This results in the molten solder to metallurgically bond to the metalized pads on the wafer and thus assuring the solder in each cavity to transfer from the mold plate to the wafer. Since various solder alloys are readily processed with the MSS technique, the mold plate and wafer assembly must remain aligned throughout the reflow process. Since the contact area between mold plate and wafer covers an entire 8 inch or 12 inch silicon wafer, it is important that these materials match very closely in coefficient of thermal expansion (CTE), for instance, when the mold plate is fabricated of a borosilicate glass.
It is therefore an object of the present invention to provide a method for forming conductive traces in a substrate that does not have the drawbacks or shortcomings of a conventional method.
It is another object of the present invention to provide a method for forming conductive traces in a substrate that does not require the wet-processing technique of electrodeposition.
It is a further object of the present invention to provide a method for forming conductive traces in a substrate that is capable of producing high quality circuits at low cost.
It is another further object of the present invention to provide a method for forming conductive traces in a substrate by scanning the substrate with an injection molded solder technique.
It is still another object of the present invention to provide a method for forming conductive traces in a substrate by utilizing the molten solder screening technique.
It is yet another object of the present invention for forming conductive traces in a flexible substrate such as a polyimide film for forming flexible circuits.
It is still another further object of the present invention to provide a method for forming conductive traces and vias in a plastic laminated board in a three-dimensional circuitization.
It is yet another further object of the present invention to provide an electronic substrate which includes a substrate of insulating material and at least one surface trace and via contact filled with a conductive metal for providing electrical communication between two conductive regions.
In accordance with the present invention, a method for forming conductive traces and via contacts in a substrate and circuits formed therefrom are provided.
In a preferred embodiment, a method for forming conductive traces in a substrate can be carried out by the operating steps of providing a substrate of a substantially electrically insulating material, forming grooves and apertures in a top surface of and through the substrate, and filling the grooves and apertures with an electrically conductive material.
The method for forming conductive traces in a substrate may further include the step of forming the grooves and apertures by a technique selected from chemical etching, physical machining and hot stamping. The grooves and apertures formed are grooves for line traces and apertures for via holes. The substrate may be formed of a polymeric material, while the electrically conductive material may be a non-lead solder, or a lead-based solder. The method may further include the step of cooling the electrically conductive material until it solidifies.
The method for forming conductive traces in a substrate may further include the step of forming a passivation layer over the substrate and the grooves and apertures filled with electrically conductive material. The passivation layer may be formed of a dielectric material. The method may further include the step of forming line traces and via contacts in the insulating substrate by a molten solder screening technique. The method may further include the step of forming via contacts that provide electrical communication between line traces that are situated in different layers in the insulating substrate. The method may further include the step of forming via contacts that provide electrical communication between conductive regions in the insulating substrate.
In an alternate embodiment, a method for forming a three-dimensional circuit in a substrate can be carried out by the steps of providing an insulating substrate, forming a least two surface indentations in the insulating substrate, and filling the at least two surface indentations with an electrically conductive material.
In the method forming a three-dimensional circuit in a substrate, the insulating substrate may be fabricated of a polymeric material. The at least two surface indentations formed may include a groove and an aperture. The method may further include the step of forming a line trace and a via contact in the insulating substrate, or the step of forming a via contact for providing electrical communication between two line traces. The method may further include the step of providing electrical communication between two conductive regions by the at least two surface indentations filled with the electrically conductive metal.
In the method for forming a three-dimensional circuit in a substrate, the method may further include the step of electrically connecting two conductive regions by a conductive trace formed in one of the at least two surface indentations. The method may further include the step of electrically connecting two conductive regions by a via contact formed in the at least two surface indentations. The method may further include the step of filling the at least two surface indentations by a molten solder screening technique, or the step of filling the at least two surface indentations by an injection molded solder technique.
The present invention is further directed to an electronic substrate which includes a substrate formed of a substantially insulating material, at least one surface groove in the substrate that is filled with a conductive metal, and at least one aperture in the substrate filled with the conductive metal to provide electrical communication to the at least one surface groove filled with conductive metal.
The electronic substrate may further include a passivation layer overlying the substrate, the surface groove and the aperture. The passivation layer may be formed of a dielectric material. The electronic substrate may further include at least one line trace formed in the at least one surface groove and at least one via contact formed in the at least one aperture.
The present invention is further shown in a first implementation example of a method for forming a chip-scale package for direct chip attach that can be carried out by the operating steps of providing an IC chip that has a plurality of conductive pads formed in an active surface, attaching a pliable film that has a plurality of apertures formed therein positioned corresponding to locations of the plurality of conductive pads to the active surface of the IC chip, filling the plurality of apertures with an electrically conductive material forming a plurality of electrically conductive columns for making electrical contacts with the plurality of conductive pads, and forming a plurality of solder balls on the pliable film each in electrical communication with one of the plurality of electrically conductive columns.
In the method for forming a chip-scale package for direct chip attach, the IC chip is unitary with a semiconductor wafer. The pliable film may be a polymeric-based film, or may be made of a material selected from the group consisting of polyimide, polyamide, polyester and PTFE. The method may further include the step of filling the plurality of apertures with a high melting point solder material, or the step of filling the plurality of apertures with a solder such as 97/3 Pb/Sn. The method may further include the step of forming the plurality of solder balls on the pliable film by a technique selected from solder injection molding, solder ball preform placement and solder paste screening. The method may further include the step of forming the plurality of solder balls in an eutectic Pb/Sn solder.
The present invention is still further shown in a second implementation example of a method for forming a wafer-level package for flip chip attachment that can be carried out by the steps of providing an IC chip in a wafer that has a plurality of conductive pads formed in an active surface, attaching a pliable film that has a plurality of apertures formed therein positioned corresponding to locations of the plurality of conductive pads on the active surface of the IC chip, filling the plurality of apertures with an electrically conductive material forming a plurality of electrically conductive columns for making electrical contacts with the plurality of conductive pads, forming a plurality of conductive runners on top of the pliable film each in electrical communication with one of the plurality of electrically conductive columns, and forming a plurality of solder balls each on one of the plurality of conductive runners in electrical communication with one of the plurality of conductive pads on the IC chip through one of the plurality of electrically conductive columns.
In the method for forming a wafer-level package for flip chip attachment, the pliable film may be a polymeric-based film selected from the group consisting of a polyimide film, a polyamide film, a polyester film and a PTFE film. The method may further include the step of filling the plurality of apertures with a high melting point solder material. The step of filling the plurality of apertures with an electrically conductive material may be carried out by a screen printing or a solder injection molding technique. The method may further include the step of forming the plurality of solder balls on the pliable film by a technique selected from the group consisting of solder injection molding, solder ball preform placement and solder paste screening. The method may further include the step of forming the plurality of solder balls in an eutectic Pb/Sn solder. The method may further include the steps of severing the IC chip from the wafer, and encapsulating the IC chip in a molding compound exposing the plurality of solder balls.
The present invention is still further shown in a third implementation example of a method for forming an IC chip/leadframe package by the operating steps of providing an IC chip that has a plurality of conductive pads in an active surface, providing a leadframe that is equipped with a plurality of lead fingers for making electrical connections with the IC chip, attaching an electrically insulating film to the active surface of the IC chip and the plurality of lead fingers, the electrically insulating film has a plurality of apertures therethrough exposing the plurality of conductive pads and the plurality of lead fingers, filling the plurality of apertures with an electrically conductive material making electrical connection with the plurality of conductive pads and forming a plurality of conductive runners on top of the electrically insulating film such that each runner electrically connecting a conductive pad to a lead finger, and encapsulating the IC chip and the plurality of lead fingers in a molding compound.
In the method for forming an IC chip/leadframe package, the electrically insulating film may be a polymeric-based film selected from the group consisting of a polyimide film, a polyamide film, a polyester film and a PTFE film. The method may further include the step of providing the lead frame in a metal that includes copper. The method may further include the step of filling the plurality of apertures with a high melting point solder material. The method may further include the step of filling the plurality of apertures with an electrically conductive material by a solder injection molding or a screen printing technique.
The present invention is still further shown in a fourth implementation example of a method for forming a chip-on-flex package that can be carried out by the operating steps of providing an IC chip that has a plurality of conductive pads in an active surface, providing a flexible film equipped with a plurality of apertures and a plurality of thin film wiring on a top surface, and filling the plurality of apertures with an electrically conductive material when a bottom surface of the flexible film is positioned juxtaposed to the active surface of the IC chip such that a plurality of conductive runners are formed on the top surface of the flexible film and a plurality of conductive columns are formed in the apertures for providing electrical communication between the plurality of conductive pads on the IC chip and the plurality of thin film wiring on the flexible film.
The method for forming a chip-on-flex package may further include the step of providing the flexible film in a flexible circuitry. The method may further include the step of providing a pre-amp chip for use in a disk drive application. The method may further include the step of filling the plurality of apertures with a solder material that includes lead. The method may farther include the step of filling the plurality of apertures by a solder injection molding or a screen printing technique. The method may further include the step of providing the flexible film in a material selected from the group consisting of polyimide, polyamide, polyester and PTFE.